00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. July 2011 00005 * $Revision: V1.0.10 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_fir_sparse_init_q7.c 00009 * 00010 * Description: Q7 sparse FIR filter initialization function. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Version 1.0.10 2011/7/15 00015 * Big Endian support added and Merged M0 and M3/M4 Source code. 00016 * 00017 * Version 1.0.3 2010/11/29 00018 * Re-organized the CMSIS folders and updated documentation. 00019 * 00020 * Version 1.0.2 2010/11/11 00021 * Documentation updated. 00022 * 00023 * Version 1.0.1 2010/10/05 00024 * Production release and review comments incorporated. 00025 * 00026 * Version 1.0.0 2010/09/20 00027 * Production release and review comments incorporated 00028 * 00029 * Version 0.0.7 2010/06/10 00030 * Misra-C changes done 00031 * ---------------------------------------------------------------------------*/ 00032 00033 #include "arm_math.h" 00034 00065 void arm_fir_sparse_init_q7( 00066 arm_fir_sparse_instance_q7 * S, 00067 uint16_t numTaps, 00068 q7_t * pCoeffs, 00069 q7_t * pState, 00070 int32_t * pTapDelay, 00071 uint16_t maxDelay, 00072 uint32_t blockSize) 00073 { 00074 /* Assign filter taps */ 00075 S->numTaps = numTaps; 00076 00077 /* Assign coefficient pointer */ 00078 S->pCoeffs = pCoeffs; 00079 00080 /* Assign TapDelay pointer */ 00081 S->pTapDelay = pTapDelay; 00082 00083 /* Assign MaxDelay */ 00084 S->maxDelay = maxDelay; 00085 00086 /* reset the stateIndex to 0 */ 00087 S->stateIndex = 0u; 00088 00089 /* Clear state buffer and size is always maxDelay + blockSize */ 00090 memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t)); 00091 00092 /* Assign state pointer */ 00093 S->pState = pState; 00094 00095 } 00096